Shane O'Connell
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Toronto, Canada
Summary
My goal is to find employment income, as well as a group of like-minded people to work on engineering problems. I would prefer to work on a team that is trying to accomplish something that is considered technically difficult. I am open to working on many different types of engineering problems.
Work Experience
- Attempted to solve world problems
- Wrote Israel-Palestine Peace Plan and sent it to the UN
- Publicly proposed a plan to provide free food and shelter to world's population in order to end homelessness, end world hunger, and end the killing of animals for food
- Engaged in scientific research
- Performed experiments and did research related to a theory about language and the brain hemispheres
- Created a website containing my conversations with ChatGPT in order to demonstrate some uses for AI, as well as using it as form of creative expression
- Improved computer security
- Created a new Linux distribution with custom package manager written in Python
- Designed and implemented software for managing large amounts of information saved from the Internet
- Designed and implemented a custom network firewall, which uses a custom protocol over a serial cable in an attempt to prevent the Intel Management Engine from accessing the Internet using Ethernet
- Attempted to resolve personal issues
- Have experienced some very stressful situations as a consequence of
something that happened in 2021 where my computer appeared to be
hacked and I was brought to a mental
health facility as a result of telling the police about it
- As a consequence, I feel very distrustful of others
- Attempted to deal with seemingly arbitrary hostility from others
- Ignored by various people with no explanation
- Repeatedly told by others that I have a mental illness, without the illness being specified or any symptoms of a mental illness identified
- Ignored and treated badly by the employees in the building I live in
- Posted online about being trapped in my apartment as a consequence of the situation, in an attempt to find someone who can help
- In reality, I most likely need a girlfriend before I find a job
- Have experienced some very stressful situations as a consequence of
something that happened in 2021 where my computer appeared to be
hacked and I was brought to a mental
health facility as a result of telling the police about it
- Did not make any employment income during this period
- Responsible for the development of RapidSilicon's timing analysis software
- Partially completed code to allow the VPR open source placement and routing engine to interface with OpenSTA to analyze timing, rather than using the Tatum timing analyzer that is part of VPR
- Worked on an MLIR-based compiler written in C++ that compiles neural network models written in PyTorch and ONNX for the Groq TSP
- Analyzed compiler runtime to find optimizations that resulted in a 5x improvement in compile time
- Designed and implemented an optimization pass which improved execution speed on the chip up to 16x, in some cases
- Designed improvements to the representation of graphs between compiler passes which reduced the complexity of representing graphs and reduced the complexity of the algorithms that operate on it
I made it sound like I did a lot, however if I remember correctly I think the optimizations I described might just mainly be referring to one change that I made that made a big difference. I also feel kind of bad about the way this particular optimization was done for some social reasons that went along with it, so I have mixed feelings about it.
I resigned from this job after it appeared that my computer had been hacked and I was brought to a mental health facility after telling the police about it. It was a highly stressful time and I was not sure what I should do.
- One of three founding members on the Deep Learning Accelerator project for Intel FPGAs
- Designed hardware (RTL) for accelerating neural networks on FPGAs
- Played a strong technical role over the life of the project, by identifying new optimization opportunities and providing guidance to newer members of the team
- Implemented hardware designs using a combination of SystemVerilog and OpenCL C using the Intel FPGA SDK for OpenCL
- Provided feedback and suggestions for optimizations to improve the Intel FPGA OpenCL compiler based on real-world use
- Developed and maintained software code in C and C++ for the FPGA SDK for OpenCL
- Implemented new features, fixed bugs, and improved performance of the runtime and Linux device driver code
- After December 2015, this position was at Intel, which acquired Altera
- Worked on the TimeQuest timing analyzer, part of the Quartus FPGA design software
- Developed and maintained software code for a large C++ application that analyzes circuit timing using multi-threaded graph traversals on large graphs with millions of edges and nodes
- Analyzed performance with code analysis tools and implemented changes to improve performance
- Designed RTL hardware cores in SystemVerilog for FPGAs to implement various networking protocols including OTN, Ethernet, and Fibre Channel
- Analyzed designs using the Quartus FPGA software to find ways to reduce area and improve performance
- After December 2010, this position was at Altera, which acquired Avalon Microelectronics
Skills
Programming Languages
C++, Python, SystemVerilog, OpenCL, HTML, JavaScript/TypeScript
Tools
git, bash, vim, tmux
Education
University of Toronto
- Master of Engineering, Computer Engineering (2017)
Memorial University of Newfoundland
- Bachelor of Engineering, Computer Engineering (2010)
Publications
- DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration 28th International Conference on Field Programmable Logic and Applications (FPL), August 2018 (with 10 other co-authors) https://doi.org/10.1109/FPL.2018.00077
- Harnessing Numerical Flexibility for Deep Learning on FPGAs HEART 2018: Proceedings of the 9th International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies, June 2018 (with 10 other co-authors) https://doi.org/10.1145/3241793.3241794
- An OpenCLâ„¢ Deep Learning Accelerator on Arria 10 FPGA '17: Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, February 2017 (with 4 other co-authors) https://doi.org/10.1145/3020078.3021738
Patents
- Floating-point decomposition circuitry with dynamic precision Patent pending, published 2020-07-09 (with 2 other co-inventors)
- Fast filtering US Patent 10083007, granted 2018-09-25 (with 3 other co-inventors)
- Methods and apparatus for rapid interrupt lookups US Patent 9811484, granted 2017-11-07 (with no other co-inventors)
Last Update: 2025-12-29